onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider {Core Control}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/s_clk_i[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/s_resetn_i[0]}
add wave -noupdate -divider {Fetch Interface}
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/s_i_haddr_o
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_i_htrans_o
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_i_hready_i
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_i_hresp_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/s_i_hrdata_i
add wave -noupdate -divider {Data Interface}
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/s_d_haddr_o
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_d_htrans_o
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_d_hwrite_o
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/s_d_hsize_o
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/s_d_hwdata_o
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_d_hready_i
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/s_d_hresp_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/s_d_hrdata_i
add wave -noupdate -divider {Core State}
add wave -noupdate -color Orange -radix unsigned {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/m_csru/s_rmcycle[0]}
add wave -noupdate -color Orange -radix unsigned {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/m_csru/s_rminstret[0]}
add wave -noupdate -color Orange -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_rpc[0]}
add wave -noupdate -color Orange -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/m_csru/s_rmhrdctrl0[0]}
add wave -noupdate -divider {Fetch Stage}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_flush_fe[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_rfe0_utd[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_rfe0_add[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_rfe1_utd[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_rfe1_add[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_rfe1_inf[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_ras_toc_valid[0]}
add wave -noupdate /tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_pred_toc_valid
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_1_fe/s_toc_in_fe1[0]}
add wave -noupdate -divider {Decode Stage}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_flush_id[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_stall_id[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_info_i[0]}
add wave -noupdate -radix hexadecimal -childformat {{{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][31]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][30]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][29]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][28]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][27]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][26]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][25]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][24]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][23]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][22]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][21]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][20]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][19]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][18]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][17]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][16]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][15]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][14]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][13]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][12]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][11]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][10]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][9]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][8]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][7]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][6]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][5]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][4]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][3]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][2]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][1]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][0]} -radix hexadecimal}} -subitemconfig {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][31]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][30]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][29]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][28]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][27]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][26]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][25]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][24]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][23]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][22]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][21]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][20]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][19]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][18]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][17]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][16]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][15]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][14]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][13]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][12]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][11]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][10]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][9]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][8]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][7]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][6]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][5]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][4]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][3]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][2]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][1]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0][0]} {-height 17 -radix hexadecimal}} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_instr_i[0]}
add wave -noupdate -radix hexadecimal -childformat {{{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_pred_i[0][1]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_pred_i[0][0]} -radix hexadecimal}} -subitemconfig {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_pred_i[0][1]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_pred_i[0][0]} {-height 17 -radix hexadecimal}} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_feid_pred_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_aligner_instr[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_aligner_nop[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_2_id/s_aligner_pred[0]}
add wave -noupdate -divider {Operands Prepare Stage}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_stall_op[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_flush_op[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_bubble[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_rs1_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_rs2_i[0]}
add wave -noupdate -radix hexadecimal -childformat {{{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[31]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[30]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[29]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[28]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[27]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[26]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[25]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[24]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[23]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[22]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[21]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[20]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[19]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[18]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[17]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[16]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[15]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[14]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[13]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[12]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[11]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[10]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[9]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[8]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[7]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[6]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[5]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[4]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[3]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[2]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[1]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[0]} -radix hexadecimal}} -subitemconfig {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[31]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[30]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[29]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[28]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[27]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[26]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[25]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[24]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[23]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[22]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[21]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[20]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[19]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[18]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[17]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[16]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[15]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[14]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[13]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[12]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[11]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[10]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[9]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[8]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[7]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[6]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[5]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[4]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[3]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[2]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[1]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i[0]} {-height 17 -radix hexadecimal}} /tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p1_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_p2_i
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_payload_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_f_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_rd_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_sctrl_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_ictrl_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_3_op/s_idop_imiscon_i[0]}
add wave -noupdate -divider {Execute Stage}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_stall_ex[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_flush_ex[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_bubble[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_op1_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_op2_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_payload_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_f_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_rd_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_ictrl_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_imiscon_i[0]}
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_4_ex/s_opex_fwd_i[0]}
add wave -noupdate -divider {Memory Access Stage}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_stall_ma[0]}
add wave -noupdate -color Orange {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_flush_ma[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_exma_val_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_exma_payload_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_exma_f_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_exma_rd_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_exma_ictrl_i[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_exma_imiscon_i[0]}
add wave -noupdate -radix hexadecimal -childformat {{{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[30]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[29]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[28]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[27]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[26]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[25]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[24]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[23]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[22]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[21]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[20]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[19]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[18]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[17]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[16]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[15]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[14]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[13]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[12]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[11]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[10]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[9]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[8]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[7]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[6]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[5]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[4]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[3]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[2]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[1]} -radix hexadecimal} {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[0]} -radix hexadecimal}} -subitemconfig {{/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[30]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[29]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[28]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[27]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[26]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[25]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[24]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[23]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[22]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[21]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[20]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[19]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[18]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[17]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[16]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[15]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[14]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[13]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[12]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[11]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[10]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[9]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[8]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[7]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[6]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[5]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[4]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[3]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[2]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[1]} {-height 17 -radix hexadecimal} {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i[0]} {-height 17 -radix hexadecimal}} /tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_tadd_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_bop_pred_i
add wave -noupdate {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_rstpp[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_new_pc[0]}
add wave -noupdate -divider {Write Back Stage}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_mawb_ictrl_o[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_mawb_rd_o[0]}
add wave -noupdate -radix hexadecimal {/tb_mh_wrapper/dut/rep[0]/core/m_pipe_5_ma/s_mawb_val_o[0]}
add wave -noupdate -divider {Register File}
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/m_rfc/m_rf0_gpr/s_we_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/m_rfc/m_rf0_gpr/s_wa_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/m_rfc/m_rf0_gpr/s_d_i
add wave -noupdate -radix hexadecimal /tb_mh_wrapper/dut/rep[0]/core/m_rfc/m_rf0_gpr/s_q
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {0 ps} 0}
quietly wave cursor active 0
configure wave -namecolwidth 276
configure wave -valuecolwidth 96
configure wave -justifyvalue left
configure wave -signalnamewidth 0
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ps
update
WaveRestoreZoom {38699 ps} {65298 ps}
